Jop Opening

Cosmik System LLC


Job Summary:

Integrating Serdes IP and FEC to digital core

Implement the micro-architectural specification in Verilog or System Verilog

Continue to assess and then refine the implementation for area, power and performance. Integration of a various functional blocks into SoC

Exercise the functionality of the block by writing basic tests and debug for various features at IP and SoC levels as deemed necessary

Candidate needs to be well versed with design care-about in finfet processes, specific experience in TSMC 16nm would be good


  • Req Ref No: CMiK0027
  • Job Title: FPGA/RTL Design Engineer
  • Location: Anywhere in USA (Remote)
  • Duration: Long Term